Keynotes

 

Anne Vanhoestenberghe
Professor of Active Implantable Medical Devices (AIMD)
Director, MAISI Facility
School of Biomedical Engineering & Imaging Sciences
King’s College London, UK
Title:
Reliability of Active Implantable Devices: can we predict, and prevent, failure?
Most research on the reliability of AIMD has focused on the prevention of corrosive failure, by limiting the formation of liquid water over the active electronics parts of the implant. Whilst two approaches, conformal coating or rigid hermetic enclosures, are successfully used in CE and FDA approved devices, the hermetic enclosure is by far the most common.

The large titanium cases with only a few metal in glass feedthroughs in use nowadays are well established. For these, there is no attempt at predicting lifetime in use, the accumulated experience of thousands of years in use has demonstrated that they are sufficiently hermetic, provided poorly sealed batches can be identified and excluded before entering service. It has therefore been sufficient to rely on a simple pass/fail test, based on a leak rate calculated on un-aged packages.

However, as we create new treatments and interventions, using innovative technologies, new materials, and much smaller devices, this approach may no longer be satisfactory. In this talk, I will review the basic assumptions and methods to evaluate the reliability of new AIMD, and discuss whether, and how, we can predict, and prevent, failure.

John H Lau

Unimicron Technology Corporation

Title: Chiplet Design and Heterogeneous Integration Packaging

Chiplet is a chip design method and heterogeneous integration is a chip packaging method. Chiplet design and heterogeneous integration packaging have been generated lots of tractions lately. For the next few years, we will see more implementations of a higher level of chiplet design and heterogeneous integration packaging, whether it is for cost, time-to-market, performance, form factor, or power consumption. In this lecture, the following topics will be covered.

  • System-on-Chip (SoC)
  • Why Chiplet Design?
  • Chiplet Design and Heterogeneous Integration Packaging
  • Lateral Communication between Chiplets (e.g., Bridges)
  • Chiplet Design and Heterogeneous Integration Packaging – Multiple System and Heterogeneous Integration
  • Summary
  • Potential R&D Topics in Chiplet Design and Heterogeneous Integration Packaging
Dr. Dongkai Shangguan

Indium Corporation

Title: Interconnect Reliability: From the Chip to the System

Interconnect reliability is critical to the reliability of semiconductor packaging and electronic systems. As newer forms of interconnects emerge to meet the demand for high density and high performance, interconnect reliability is becoming more complex and more critical. The growing adoption of heterogeneous integration leads to increased diversity of interconnects (with different geometries, materials, and interfaces) in the same package, with complex (and often interactive) reliability failure modes and mechanisms. Finer pitch interconnects in advanced packaging are more susceptible to failures due to electromigration, interfacial reactions etc. Wafer level packaging, Cu direct bonding and other advanced packaging technologies, present new  considerations in interconnect reliability.
At the same time, as electronic products become more pervasive in application, interconnect reliability must be considered holistically with regard to environmental conditions, from thermal, mechanical, and thermomechanical, to electrical and electrochemical. High frequency applications demand considerations of interconnect materials for signal integrity. High thermal density and high current density can have increased impact on interconnect reliability. These considerations will impact  reliability engineering for semiconductor devices, from design for reliability, to accelerated testing and analysis. Yet another important dimension for interconnect reliability involves sustainability of electronic products, which demands environmentally friendly materials and processes, such as no-clean soldering, lead-free soldering, low temperature soldering, etc. Understanding of the failure mechanisms for different interconnect materials at various levels (wafer, chip, package, and system) of the semiconductor package, is of great importance to interconnect reliability, and ultimately reliability of semiconductor devices and electronic systems.